Semiconductor Technologies
Process nodes and design approaches mastered throughout my career
Process Nodes
Foundry Experience
Throughout my 21+ year career in the semiconductor industry, I have worked with a wide range of process technologies across multiple foundries. My experience spans from mature nodes to advanced processes, enabling me to develop secure and efficient analog solutions for various applications.
Process nodes I've worked with:
Foundries I've worked with:
Process types:
Design Approaches
Low Power Design
Specialized in ultra-low power design techniques for battery-powered and energy harvesting applications, with particular focus on optimizing standby current and active power consumption. My designs include power management circuits that maintain high efficiency across multiple operating modes, from deep sleep to full performance.
Security-Oriented Design
Implementation of security features at the transistor and circuit level to protect against physical and side-channel attacks, including power analysis countermeasures and glitch detection. My security-focused approach incorporates tamper-resistant layout techniques, balanced power consumption circuits, and environmental monitoring sensors.
RF Design
Design of RF front-ends for contactless applications, including matching networks, demodulators, and modulators optimized for ISO14443 and ISO15693 standards. My RF designs achieve high sensitivity reception and efficient power transfer while maintaining robust operation in noisy environments and varying coupling conditions.
Environmental Robustness
Development of circuits that maintain performance across wide temperature ranges (-40°C to 125°C) and supply voltage variations, essential for automotive and industrial applications. My designs include compensation techniques that ensure stable operation under extreme conditions while maintaining security properties.
Integration Expertise
Mixed-Signal Integration
Experience in integrating analog and digital circuits in mixed-signal environments, with careful consideration of noise isolation and substrate coupling effects. My integration approach includes floor planning strategies, guard rings, and specialized layout techniques to minimize interference between sensitive analog blocks and noisy digital circuits.
Non-Volatile Memory
Integration of secure non-volatile memory solutions, including EEPROM and Flash, with analog security monitoring circuits for data protection. My designs incorporate secure boot mechanisms, authenticated memory access, and integrity validation to protect against unauthorized access and modification of sensitive data.
System-Level Design
Holistic approach to system architecture, considering interactions between analog, digital, and RF domains to optimize overall performance and security. My system-level designs balance power, area, and performance constraints while ensuring that security is maintained across all operating conditions and throughout the product lifecycle.